In general, software for operating a system-on-chip (SOC) and/or other software may be stored in read-only memories (ROMs) that is called firmware. The ROMs store program codes corresponding to the firmware in ROM cells in a manufacturing process, that is, in a semiconductor wafer processing step. For example, mask ROMs are programmed to be “on” or “off” in a channel region of a transistor included in a memory cell, depending on whether an implant process is performed in accordance with a program code. Accordingly, the mask ROMs generally can store data just one time. Since the mask ROMs have no write circuit, their configuration may be simple. Moreover, since the mask ROMs may not use a special process for a cell structure, the mask ROMs may be low or lowest in terms of manufacturing costs. The design of mask ROMs is well known to those having skill in the art and need not be described further herein.
Programmable and erasable memory devices also have been developed. These devices can be used to correct the firmware even after the SOCs have been made. A representative programmable and erasable memory device is an electrically erasable and programmable read-only memory (EEPROM). An EEPROM generally includes a transistor which has a control gate and a floating gate formed in a channel region between a source and a drain. A threshold voltage of the transistor is controlled by the amount of charge in the floating gate. That is, when a turn-on voltage of the transistor which conducts between the source and the drain is applied to the control gate, the turn-on voltage is controlled by the level of the charge in the floating gate. The transistor is programmed to be either “on” or “off” by electrons which are trapped on the floating gate through a gate oxide layer from the channel region in a substrate.
Whether the EEPROM cell transistor is programmed to be “on” or “off” is determined by detecting the level of current flowing between the source and the drain after an operating voltage is applied to the control gate and both ends of the source and the drain. When a proper amount of current is applied to the source and drain, and the control gate of the programmed transistor, charges are transferred to the drain from the floating gate by a tunneling mechanism, such that the EEPROMs can be electrically erased. Particularly, EEPROMs which can erase all memory cells or memory cells of a specific group at a time are called flash memories. The design of EEPROMs and flash memory devices are well known to those having skill in the art and need not be described further herein.
A conventional process of producing SOCs will now be described. When developing programs for the SOCs, EEPROMs or flash memories may be used since the EEPROMs or flash memories can correct firmware even after integrated circuit chips have already been manufactured. When producing the SOCs, the developed programs may be stored in ROMs. Moreover, as a variety of SOCs have been developed, there may be many cases that some products share firmware but some other products use different firmware. Accordingly, both ROM chips and EEPROM chips or flash memory chips may be used in the SOCs, so that the shared firmware can be stored in the ROMs and different firmware can be stored in the EEPROMs or the flash memories.